News & Progress — The Verified Record .

We report what we have done. Not what we plan to announce.

Milestone Timeline
Date Milestone
2026.04 G1 Alpha Testing Complete — FPGA validation passed. Power benchmark data collected and filed. Initial performance results transmitted to NDA partner review group.
2025.11 Patent Portfolio Established — Series of 14 patents filed across FII framework, GLU architecture, and eABI interoperability layer.
2025.08 Founding Team Assembled — Core technical and leadership team formed. FII mathematics formalised and documented. RTL design programme initiated.